Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Renesas Electronics/R7FA6M3AH/BUS/SDRFCR#0x0
RFC=others
SDRAM Refresh Control Register
Auto-Refresh Request Interval Setting
0 (0x0): Setting prohibited
0 (others): RFC+1 cycles inserted
Auto-Refresh Cycle/ Self-Refresh Clearing Cycle Count Setting. ( REFW+1 Cycles )
https://github.com/cmsis-svd/cmsis-svd-data